[2025-09-21T08:27:54Z INFO  snow_core::mac::compact::bus] Skipping memory test
[2025-09-21T08:27:54Z INFO  snow_core::cpu_m68k::cpu] Reset - SSP: B306E171, PC: 0040002A
[2025-09-21T08:27:54Z INFO  single] No replay file found
[2025-09-21T08:27:54Z INFO  single] Starting
[2025-09-21T08:27:54Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 0, 0, 0, 0, 0, 0, 0], a: [0, 0, 0, 0, 0, 0, 0], usp: 0, isp: 3003572593, sr: RegisterSR { 0: 9984, sr: 9984, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4194346, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: false, breakpoints: [], cycles: 24, fdd: [FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Accurate, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:27:54Z INFO  single] Event: NextCode
[2025-09-21T08:27:54Z INFO  snow_core::mac::swim::drive] Drive 0: disk inserted, 80 tracks, title: 'Mindshadow'
[2025-09-21T08:27:54Z INFO  snow_core::emulator] Running
[2025-09-21T08:27:54Z INFO  snow_core::mac::compact::bus] Emulation speed: Uncapped
[2025-09-21T08:27:54Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 0, 0, 0, 0, 0, 0, 0], a: [0, 0, 0, 0, 0, 0, 0], usp: 0, isp: 3003572593, sr: RegisterSR { 0: 9984, sr: 9984, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4194346, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: false, breakpoints: [], cycles: 24, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Accurate, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:27:54Z INFO  single] Event: NextCode
[2025-09-21T08:27:54Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 0, 0, 0, 0, 0, 0, 0], a: [0, 0, 0, 0, 0, 0, 0], usp: 0, isp: 3003572593, sr: RegisterSR { 0: 9984, sr: 9984, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4194346, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 24, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Accurate, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:27:54Z INFO  single] Event: NextCode
[2025-09-21T08:27:54Z WARN  snow_core::mac::scc] B unimplemented wr reg 4 4C
[2025-09-21T08:27:54Z WARN  snow_core::mac::scc] A unimplemented wr reg 4 4C
[2025-09-21T08:27:54Z DEBUG snow_core::cpu_m68k::cpu] Illegal instruction PC 00400402: 4E7B 0100111001111011 Cannot decode instruction: 0100111001111011
[2025-09-21T08:27:54Z WARN  snow_core::cpu_m68k::cpu] Illegal instruction at PC $00400402
[2025-09-21T08:27:54Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [16096, 212, 4294967253, 65400, 1, 6, 48, 0], a: [4235968, 15720958, 4235884, 4204180, 4193536, 4235852, 4236026], usp: 0, isp: 262008, sr: RegisterSR { 0: 9984, sr: 9984, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4236068, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 11529578, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:27:54Z INFO  single] Event: NextCode
[2025-09-21T08:27:55Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [65280, 34, 127, 65535, 1840700269, 4196096, 0, 0], a: [4207516, 15720958, 4265772, 6780, 4193536, 15720958, 4194480], usp: 0, isp: 262140, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207460, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 24801302, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:27:55Z INFO  single] Event: NextCode
[2025-09-21T08:27:55Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [241643, 0, 4301392, 65535, 0, 1262682113, 0, 0], a: [4301414, 4301392, 7158, 6287360, 7216, 15720958, 2096114], usp: 0, isp: 2096066, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302922, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 38146500, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:27:55Z INFO  single] Event: NextCode
[2025-09-21T08:27:56Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 123662, 128, 3, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095522, 6287360, 7216, 2096528, 2095482], usp: 0, isp: 2095430, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302946, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 49227210, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:27:56Z INFO  single] Event: NextCode
[2025-09-21T08:27:56Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 85434, 128, 0, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302946, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 62667956, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:27:56Z INFO  single] Event: NextCode
[2025-09-21T08:27:57Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 122426, 128, 0, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 74003168, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:27:57Z INFO  single] Event: NextCode
[2025-09-21T08:27:57Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 102459, 128, 0, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 86920140, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:27:57Z INFO  single] Event: NextCode
[2025-09-21T08:27:58Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 69175, 128, 0, 5, 1537736705, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302946, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 98386926, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:27:58Z INFO  single] Event: NextCode
[2025-09-21T08:27:58Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 104964, 128, 0, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 111567210, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:27:58Z INFO  single] Event: NextCode
[2025-09-21T08:27:59Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 103831, 128, 0, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302946, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 123955728, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:27:59Z INFO  single] Event: NextCode
[2025-09-21T08:27:59Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 140, 750, 4294901760, 1840644096, 4196096, 256, 0], a: [2096128, 2147491252, 4206940, 4198110, 225, 2096528, 2097152], usp: 0, isp: 2096088, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207042, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 134546134, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 0, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:27:59Z INFO  single] Event: NextCode
[2025-09-21T08:28:00Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 140, 9, 8, 0, 4199004, 4294967295, 0], a: [932, 2147491252, 4206940, 15662, 16214, 0, 14870], usp: 0, isp: 2095992, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207038, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 142496502, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 0, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:28:00Z INFO  single] Event: NextCode
[2025-09-21T08:28:00Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1342, 3, 122, 0, 65535, 255, 140, 4294901817], a: [4444306, 7662, 4444306, 4444926, 14678527, 15728638, 10485758], usp: 0, isp: 2095738, sr: RegisterSR { 0: 8968, sr: 8968, ccr: 8, c: false, v: false, z: false, n: true, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4444470, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 151156588, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 57, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:28:00Z INFO  single] Event: NextCode
[2025-09-21T08:28:01Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [12, 10, 28570, 760, 3, 5908, 36, 0], a: [28582, 28602, 4240012, 28562, 5632, 2096528, 5632], usp: 0, isp: 2095836, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4240038, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 157099620, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 56, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:28:01Z INFO  single] Event: NextCode
[2025-09-21T08:28:01Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1023, 3, 122, 0, 0, 0, 140, 4294901833], a: [4444306, 7662, 4444306, 4444926, 14678527, 15728638, 10485758], usp: 0, isp: 4158102, sr: RegisterSR { 0: 8964, sr: 8964, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4444454, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 165040932, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 73, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:28:01Z INFO  single] Event: NextCode
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967240, 548, 2147483653, 717, 0, 3, 130822, 0], a: [130870, 7662, 4408960, 4409460, 4409452, 4170880, 4158454], usp: 0, isp: 4158070, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4409538, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 172982950, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 76, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:28:02Z INFO  single] Event: NextCode
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:28:02Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:28:02Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 140, 4, 717, 0, 3, 130822, 0], a: [130870, 2147491252, 4206940, 122768, 122782, 4170880, 4158454], usp: 0, isp: 4158126, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207038, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 181612090, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 1, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:28:02Z INFO  single] Event: NextCode
[2025-09-21T08:28:03Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 140, 4, 717, 0, 3, 130822, 0], a: [130870, 2147491252, 4206940, 122768, 122782, 4170880, 4158454], usp: 0, isp: 4158126, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207038, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 190440732, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 1, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:28:03Z INFO  single] Event: NextCode
[2025-09-21T08:28:03Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 87914, 3053440, 0, 5, 1537736705, 250, 0], a: [6287377, 4167510, 125398, 6287360, 7216, 4170880, 4158432], usp: 0, isp: 4158380, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 198528798, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 65, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:28:03Z INFO  single] Event: NextCode
[2025-09-21T08:28:04Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967295, 4, 3014656, 0, 7, 16, 0, 0], a: [4167510, 4167510, 125398, 4167510, 122782, 4170880, 4158462], usp: 0, isp: 4158454, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4240990, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 206723906, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 65, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:28:04Z INFO  single] Event: NextCode
[2025-09-21T08:28:04Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294901760, 1, 3014656, 0, 7, 16, 0, 0], a: [4240862, 543, 125398, 122768, 122782, 4170880, 4158506], usp: 0, isp: 4158492, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 116130, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 215878554, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 65, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:28:04Z INFO  single] Event: NextCode
[2025-09-21T08:28:05Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [46, 0, 3014656, 0, 7, 16, 0, 0], a: [4167510, 543, 125398, 4167510, 122782, 4170880, 4158462], usp: 0, isp: 4158434, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4205788, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 229766864, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 65, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:28:05Z INFO  single] Event: NextCode
[2025-09-21T08:28:05Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294901760, 1, 3014656, 0, 7, 16, 0, 0], a: [4240862, 543, 125398, 122768, 122782, 4170880, 4158488], usp: 0, isp: 4158488, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 116128, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 237817174, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 65, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:28:05Z INFO  single] Event: NextCode
[2025-09-21T08:28:06Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294901760, 43121, 3014769, 0, 7, 16, 0, 0], a: [4167510, 2554, 3584, 4167510, 122782, 4170880, 4158462], usp: 0, isp: 4158422, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4205814, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 245865828, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 65, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:28:06Z INFO  single] Event: NextCode
[2025-09-21T08:28:06Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294901806, 1, 3014656, 0, 7, 16, 0, 0], a: [4167510, 2554, 125398, 4167510, 122782, 4170880, 4158462], usp: 0, isp: 4158442, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4240692, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 253755908, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 65, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:28:06Z INFO  single] Event: NextCode
[2025-09-21T08:28:07Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [116124, 4167510, 3014656, 0, 7, 16, 0, 0], a: [4240862, 543, 125398, 122768, 122782, 4170880, 4158488], usp: 0, isp: 4158482, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4240852, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 261805318, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 65, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:28:07Z INFO  single] Event: NextCode
[2025-09-21T08:28:07Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 4167510, 3014656, 0, 7, 16, 0, 0], a: [4240862, 543, 125398, 122768, 122782, 4170880, 4158462], usp: 0, isp: 4158462, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4240884, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 269854836, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 65, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:28:07Z INFO  single] Event: NextCode
[2025-09-21T08:28:08Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294901760, 1, 3014656, 0, 7, 16, 0, 0], a: [4240862, 4167510, 125398, 122768, 122782, 4170880, 4158488], usp: 0, isp: 4158482, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4195942, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 277904018, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 65, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:28:08Z INFO  single] Event: NextCode
[2025-09-21T08:28:08Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294901806, 4, 3014656, 0, 7, 16, 0, 0], a: [4167510, 4167510, 125398, 4167510, 122782, 4170880, 4158462], usp: 0, isp: 4158454, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4241032, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 285794364, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 65, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:28:08Z INFO  single] Event: NextCode
[2025-09-21T08:28:09Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [46, 0, 3014656, 0, 7, 16, 0, 0], a: [4167510, 543, 125398, 4167510, 122782, 4170880, 4158474], usp: 0, isp: 4158460, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4205782, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 290025758, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 66, image_title: "Mindshadow", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:28:09Z INFO  single] Event: NextCode
[2025-09-21T08:28:09Z INFO  single] deduplicated 120 frames to 10