[2025-09-21T08:25:08Z INFO  snow_core::mac::compact::bus] Skipping memory test
[2025-09-21T08:25:08Z INFO  snow_core::cpu_m68k::cpu] Reset - SSP: B306E171, PC: 0040002A
[2025-09-21T08:25:08Z INFO  single] No replay file found
[2025-09-21T08:25:08Z INFO  single] Starting
[2025-09-21T08:25:08Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 0, 0, 0, 0, 0, 0, 0], a: [0, 0, 0, 0, 0, 0, 0], usp: 0, isp: 3003572593, sr: RegisterSR { 0: 9984, sr: 9984, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4194346, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: false, breakpoints: [], cycles: 24, fdd: [FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Accurate, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:08Z INFO  single] Event: NextCode
[2025-09-21T08:25:08Z INFO  snow_core::mac::swim::drive] Drive 0: disk inserted, 80 tracks, title: 'Hacker'
[2025-09-21T08:25:08Z INFO  snow_core::emulator] Running
[2025-09-21T08:25:08Z INFO  snow_core::mac::compact::bus] Emulation speed: Uncapped
[2025-09-21T08:25:08Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 0, 0, 0, 0, 0, 0, 0], a: [0, 0, 0, 0, 0, 0, 0], usp: 0, isp: 3003572593, sr: RegisterSR { 0: 9984, sr: 9984, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4194346, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: false, breakpoints: [], cycles: 24, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Accurate, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:08Z INFO  single] Event: NextCode
[2025-09-21T08:25:08Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 0, 0, 0, 0, 0, 0, 0], a: [0, 0, 0, 0, 0, 0, 0], usp: 0, isp: 3003572593, sr: RegisterSR { 0: 9984, sr: 9984, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4194346, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 24, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Accurate, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:08Z INFO  single] Event: NextCode
[2025-09-21T08:25:08Z WARN  snow_core::mac::scc] B unimplemented wr reg 4 4C
[2025-09-21T08:25:08Z WARN  snow_core::mac::scc] A unimplemented wr reg 4 4C
[2025-09-21T08:25:08Z DEBUG snow_core::cpu_m68k::cpu] Illegal instruction PC 00400402: 4E7B 0100111001111011 Cannot decode instruction: 0100111001111011
[2025-09-21T08:25:08Z WARN  snow_core::cpu_m68k::cpu] Illegal instruction at PC $00400402
[2025-09-21T08:25:08Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294965853, 207, 211, 4294901798, 1840700269, 4196096, 0, 0], a: [4194276, 4193830, 4195736, 4204180, 4193536, 15720958, 4194304], usp: 0, isp: 1020, sr: RegisterSR { 0: 9988, sr: 9988, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4205204, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 5660828, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:08Z INFO  single] Event: NextCode
[2025-09-21T08:25:09Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [65280, 34, 127, 65535, 1840700269, 4196096, 0, 0], a: [4207516, 15720958, 4265772, 6780, 4193536, 15720958, 4194480], usp: 0, isp: 262140, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207454, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 13656774, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:09Z INFO  single] Event: NextCode
[2025-09-21T08:25:09Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [65280, 34, 127, 65535, 1840700269, 4196096, 0, 0], a: [4207516, 15720958, 4265772, 6780, 4193536, 15720958, 4194480], usp: 0, isp: 262140, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207454, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 21578720, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:09Z INFO  single] Event: NextCode
[2025-09-21T08:25:10Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [65280, 34, 127, 65535, 1840700269, 4196096, 0, 0], a: [4207516, 15720958, 4265772, 6780, 4193536, 15720958, 4194480], usp: 0, isp: 262140, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207460, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 29903008, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:10Z INFO  single] Event: NextCode
[2025-09-21T08:25:10Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [241643, 0, 4301392, 65535, 0, 1262682113, 0, 0], a: [4301414, 4301392, 7158, 6287360, 7216, 15720958, 2096114], usp: 0, isp: 2096066, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302922, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 38146500, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:10Z INFO  single] Event: NextCode
[2025-09-21T08:25:11Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 126153, 128, 5, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095522, 6287360, 7216, 2096528, 2095482], usp: 0, isp: 2095430, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 44218796, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:11Z INFO  single] Event: NextCode
[2025-09-21T08:25:11Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 89156, 128, 2, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095522, 6287360, 7216, 2096528, 2095482], usp: 0, isp: 2095430, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302946, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 52653728, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:11Z INFO  single] Event: NextCode
[2025-09-21T08:25:12Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 77083, 128, 0, 5, 1537736705, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 61086150, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:12Z INFO  single] Event: NextCode
[2025-09-21T08:25:12Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 105742, 128, 0, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302946, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 69521472, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:12Z INFO  single] Event: NextCode
[2025-09-21T08:25:13Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 87850, 128, 0, 5, 1537736705, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 78088952, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:13Z INFO  single] Event: NextCode
[2025-09-21T08:25:13Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 116770, 128, 0, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 86524854, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:13Z INFO  single] Event: NextCode
[2025-09-21T08:25:14Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 79917, 128, 0, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 94960142, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:14Z INFO  single] Event: NextCode
[2025-09-21T08:25:14Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 68021, 128, 0, 5, 1537736705, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302946, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 110776140, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:14Z INFO  single] Event: NextCode
[2025-09-21T08:25:15Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 122906, 128, 0, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 123428562, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:15Z INFO  single] Event: NextCode
[2025-09-21T08:25:15Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 140, 750, 4294901760, 1840644096, 4196096, 256, 0], a: [2096128, 2147491252, 4206940, 4198110, 225, 2096528, 2097152], usp: 0, isp: 2096088, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207042, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 134426914, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 0, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:15Z INFO  single] Event: NextCode
[2025-09-21T08:25:16Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 192, 0, 0, 4294836725, 57, 206, 167], a: [16253, 776, 4444575, 4444926, 14678527, 15728638, 10485758], usp: 0, isp: 2095850, sr: RegisterSR { 0: 8964, sr: 8964, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4444836, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 143371862, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 0, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:16Z INFO  single] Event: NextCode
[2025-09-21T08:25:16Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 140, 5, 8, 46079, 44544, 87, 13], a: [932, 2147491252, 4206940, 15662, 16214, 0, 14870], usp: 0, isp: 2095880, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207038, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 150654454, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 10, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:16Z INFO  single] Event: NextCode
[2025-09-21T08:25:17Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1417, 3, 123, 0, 65535, 250, 140, 3], a: [4444306, 7662, 4444306, 4444926, 14678527, 15728638, 10485758], usp: 0, isp: 2095706, sr: RegisterSR { 0: 8968, sr: 8968, ccr: 8, c: false, v: false, z: false, n: true, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4444456, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 157329252, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 3, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:17Z INFO  single] Event: NextCode
[2025-09-21T08:25:17Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1468, 140, 120, 0, 528, 255, 140, 217], a: [14672383, 7662, 4444306, 4444926, 14678527, 15728638, 10485758], usp: 0, isp: 4171098, sr: RegisterSR { 0: 8960, sr: 8960, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4444444, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 165602894, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 41, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:17Z INFO  single] Event: NextCode
[2025-09-21T08:25:18Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 0, 0, 0, 33423370, 0, 0, 0], a: [15702, 765, 4444575, 4444926, 14678527, 15728638, 10485758], usp: 0, isp: 4170226, sr: RegisterSR { 0: 8964, sr: 8964, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4444706, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 171825082, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 10, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:18Z INFO  single] Event: NextCode
[2025-09-21T08:25:18Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 35, 0, 0, 4294836542, 20, 88, 227], a: [29063, 776, 4444575, 4444926, 14678527, 15728638, 10485758], usp: 0, isp: 4170194, sr: RegisterSR { 0: 8964, sr: 8964, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4444810, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 179471324, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 46, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:18Z INFO  single] Event: NextCode
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:25:19Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:25:19Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 140, 4, 717, 0, 3, 109298, 0], a: [109346, 2147491252, 4206940, 4170914, 111756, 4170880, 4170548], usp: 0, isp: 4170220, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207038, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 186502790, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:19Z INFO  single] Event: NextCode
[2025-09-21T08:25:19Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 140, 4, 717, 0, 3, 109298, 0], a: [109346, 2147491252, 4206940, 4170914, 111756, 4170880, 4170548], usp: 0, isp: 4170220, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207038, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 195531990, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:19Z INFO  single] Event: NextCode
[2025-09-21T08:25:20Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 618, 1, 0, 0, 0, 0, 0], a: [113752, 2147492160, 4207052, 4170914, 129490, 4170880, 2097152], usp: 0, isp: 4170516, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207042, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 201887314, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:20Z INFO  single] Event: NextCode
[2025-09-21T08:25:21Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [50236, 4294967295, 65535, 2, 393343, 65534, 0, 0], a: [2, 4279350, 4169668, 62, 4170256, 4175758, 4169586], usp: 0, isp: 4169468, sr: RegisterSR { 0: 8217, sr: 8217, ccr: 25, c: true, v: false, z: false, n: true, x: true, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4279378, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 208546972, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:21Z INFO  single] Event: NextCode
[2025-09-21T08:25:21Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [16777216, 33, 89, 44, 95, 0, 1, 0], a: [4170522, 4170290, 2688795140, 111416, 2456, 4170880, 4170260], usp: 0, isp: 4170240, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4278462, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 216218444, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:21Z INFO  single] Event: NextCode
[2025-09-21T08:25:22Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [16777218, 0, 0, 312, 480, 0, 1, 0], a: [106856, 4170282, 2688795140, 111416, 2456, 4170880, 4170260], usp: 0, isp: 4170240, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4278436, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 227038374, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:22Z INFO  single] Event: NextCode
[2025-09-21T08:25:22Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4037694, 12, 1156, 27, 0, 0, 1, 0], a: [2688795166, 39878, 2688795140, 111416, 2456, 4170880, 4170534], usp: 0, isp: 4170262, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4274486, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 238954700, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:22Z INFO  single] Event: NextCode
[2025-09-21T08:25:23Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [217, 0, 1156, 65535, 0, 0, 1, 0], a: [2688796288, 2688796728, 2688795140, 111416, 2456, 4170880, 4170534], usp: 0, isp: 4170150, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4274544, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 251419852, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:23Z INFO  single] Event: NextCode
[2025-09-21T08:25:23Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [16777238, 102, 6225964, 0, 0, 0, 1, 0], a: [2688795166, 39878, 2688795140, 111416, 2456, 4170880, 4170534], usp: 0, isp: 4170290, sr: RegisterSR { 0: 8201, sr: 8201, ccr: 9, c: true, v: false, z: false, n: true, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4274322, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 264978406, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:23Z INFO  single] Event: NextCode
[2025-09-21T08:25:24Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [264650660, 2, 24, 126, 458750, 1, 0, 3], a: [4270958, 4170608, 102, 12, 2688795774, 4170218, 4170534], usp: 0, isp: 4170150, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4275018, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 274976944, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:24Z INFO  single] Event: NextCode
[2025-09-21T08:25:24Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4037694, 12, 1156, 2, 0, 0, 1, 0], a: [2688795166, 39878, 2688795140, 111416, 2456, 4170880, 4170534], usp: 0, isp: 4170166, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4274484, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 288262294, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:25:24Z INFO  single] Event: NextCode
[2025-09-21T08:25:24Z INFO  single] deduplicated 120 frames to 1