[2025-09-21T08:24:35Z INFO  snow_core::mac::compact::bus] Skipping memory test
[2025-09-21T08:24:35Z INFO  snow_core::cpu_m68k::cpu] Reset - SSP: B306E171, PC: 0040002A
[2025-09-21T08:24:35Z INFO  single] No replay file found
[2025-09-21T08:24:35Z INFO  single] Starting
[2025-09-21T08:24:35Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 0, 0, 0, 0, 0, 0, 0], a: [0, 0, 0, 0, 0, 0, 0], usp: 0, isp: 3003572593, sr: RegisterSR { 0: 9984, sr: 9984, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4194346, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: false, breakpoints: [], cycles: 24, fdd: [FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Accurate, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:35Z INFO  single] Event: NextCode
[2025-09-21T08:24:35Z DEBUG snow_floppy::loaders::a2r3] Converting resolution: 62500 -> 125000
[2025-09-21T08:24:35Z INFO  snow_core::mac::swim::drive] Drive 0: disk inserted, 80 tracks, title: 'Hacker'
[2025-09-21T08:24:35Z INFO  snow_core::emulator] Running
[2025-09-21T08:24:35Z INFO  snow_core::mac::compact::bus] Emulation speed: Uncapped
[2025-09-21T08:24:35Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 0, 0, 0, 0, 0, 0, 0], a: [0, 0, 0, 0, 0, 0, 0], usp: 0, isp: 3003572593, sr: RegisterSR { 0: 9984, sr: 9984, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4194346, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: false, breakpoints: [], cycles: 24, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Accurate, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:35Z INFO  single] Event: NextCode
[2025-09-21T08:24:35Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 0, 0, 0, 0, 0, 0, 0], a: [0, 0, 0, 0, 0, 0, 0], usp: 0, isp: 3003572593, sr: RegisterSR { 0: 9984, sr: 9984, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4194346, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 24, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Accurate, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:35Z INFO  single] Event: NextCode
[2025-09-21T08:24:35Z WARN  snow_core::mac::scc] B unimplemented wr reg 4 4C
[2025-09-21T08:24:35Z WARN  snow_core::mac::scc] A unimplemented wr reg 4 4C
[2025-09-21T08:24:35Z DEBUG snow_core::cpu_m68k::cpu] Illegal instruction PC 00400402: 4E7B 0100111001111011 Cannot decode instruction: 0100111001111011
[2025-09-21T08:24:35Z WARN  snow_core::cpu_m68k::cpu] Illegal instruction at PC $00400402
[2025-09-21T08:24:35Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294966458, 192, 192, 4294901800, 1840700269, 4196096, 0, 0], a: [4194276, 4193830, 4195736, 4204180, 4193536, 15720958, 4194304], usp: 0, isp: 1020, sr: RegisterSR { 0: 10004, sr: 10004, ccr: 20, c: false, v: false, z: true, n: false, x: true, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4205204, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 5382198, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:35Z INFO  single] Event: NextCode
[2025-09-21T08:24:36Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [65280, 34, 127, 65535, 1840700269, 4196096, 0, 0], a: [4207516, 15720958, 4265772, 6780, 4193536, 15720958, 4194480], usp: 0, isp: 262140, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207460, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 13388412, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:36Z INFO  single] Event: NextCode
[2025-09-21T08:24:36Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [65280, 34, 127, 65535, 1840700269, 4196096, 0, 0], a: [4207516, 15720958, 4265772, 6780, 4193536, 15720958, 4194480], usp: 0, isp: 262140, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207454, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 21578720, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:36Z INFO  single] Event: NextCode
[2025-09-21T08:24:37Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [65280, 34, 127, 65535, 1840700269, 4196096, 0, 0], a: [4207516, 15720958, 4265772, 6780, 4193536, 15720958, 4194480], usp: 0, isp: 262140, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207460, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 33394012, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:37Z INFO  single] Event: NextCode
[2025-09-21T08:24:37Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 92799, 128, 5, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095522, 6287360, 7216, 2096528, 2095482], usp: 0, isp: 2095430, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 45141470, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:37Z INFO  single] Event: NextCode
[2025-09-21T08:24:38Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 67687, 128, 0, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302946, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 60690888, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:38Z INFO  single] Event: NextCode
[2025-09-21T08:24:38Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 67729, 128, 0, 5, 1537736705, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302946, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 71234968, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:38Z INFO  single] Event: NextCode
[2025-09-21T08:24:39Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 80926, 128, 0, 5, 1537736705, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 83229468, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:39Z INFO  single] Event: NextCode
[2025-09-21T08:24:39Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 88130, 128, 0, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302946, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 97200970, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:39Z INFO  single] Event: NextCode
[2025-09-21T08:24:40Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 88163, 128, 0, 5, 1537736705, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 107744774, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:40Z INFO  single] Event: NextCode
[2025-09-21T08:24:40Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 82277, 128, 0, 5, 1537736705, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 120265370, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:40Z INFO  single] Event: NextCode
[2025-09-21T08:24:41Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 140, 750, 4294901760, 1840644096, 4196096, 256, 0], a: [2096128, 2147491252, 4206940, 4198110, 225, 2096528, 2097152], usp: 0, isp: 2096088, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207038, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 131332140, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 0, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:41Z INFO  single] Event: NextCode
[2025-09-21T08:24:41Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [18, 1073741824, 4294967104, 954, 1476395061, 4199004, 256, 0], a: [10234, 10278, 5920, 10234, 5632, 2096528, 5632], usp: 0, isp: 2095904, sr: RegisterSR { 0: 8208, sr: 8208, ccr: 16, c: false, v: false, z: false, n: false, x: true, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4239900, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 138214634, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 0, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:41Z INFO  single] Event: NextCode
[2025-09-21T08:24:42Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 140, 11, 8, 0, 0, 4294967295, 0], a: [932, 2147491252, 4206940, 16762, 17314, 0, 14870], usp: 0, isp: 2095992, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207038, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 146749388, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 0, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:42Z INFO  single] Event: NextCode
[2025-09-21T08:24:42Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 140, 80, 1, 8, 3, 3, 4294967221], a: [14672383, 7662, 15720958, 16242, 16214, 0, 4410926], usp: 0, isp: 2095776, sr: RegisterSR { 0: 8452, sr: 8452, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 1, m: false, supervisor: true, trace: false }, pc: 4411782, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 154029354, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 6, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:42Z INFO  single] Event: NextCode
[2025-09-21T08:24:43Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [65535, 65535, 0, 0, 95, 5888, 36, 0], a: [4171424, 15674, 25422, 15662, 15674, 2096528, 14878], usp: 0, isp: 4171340, sr: RegisterSR { 0: 8200, sr: 8200, ccr: 8, c: false, v: false, z: false, n: true, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4231866, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 161464194, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 7, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:43Z INFO  single] Event: NextCode
[2025-09-21T08:24:43Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 129, 128, 0, 4294836572, 186, 26, 69], a: [29557, 776, 4444575, 4444926, 14678527, 15728638, 10485758], usp: 0, isp: 4170140, sr: RegisterSR { 0: 8964, sr: 8964, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4444810, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 170577408, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:43Z INFO  single] Event: NextCode
[2025-09-21T08:24:44Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 43, 2, 2, 65535, 170, 140, 4294901803], a: [4418508, 7662, 4444306, 4444926, 14678527, 15728638, 10485758], usp: 0, isp: 4170160, sr: RegisterSR { 0: 8964, sr: 8964, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4411100, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 177973404, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 43, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:44Z INFO  single] Event: NextCode
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1272, 3, 122, 0, 8, 181, 140, 4294901761], a: [4444306, 7662, 4444306, 4444926, 14678527, 15728638, 10485758], usp: 0, isp: 4170078, sr: RegisterSR { 0: 8968, sr: 8968, ccr: 8, c: false, v: false, z: false, n: true, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4444454, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 184187068, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:44Z INFO  single] Event: NextCode
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:24:44Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:24:45Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 140, 4, 717, 0, 3, 109298, 0], a: [109346, 2147491252, 4206940, 4170914, 111756, 4170880, 4170548], usp: 0, isp: 4170220, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207042, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 191506060, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:45Z INFO  single] Event: NextCode
[2025-09-21T08:24:45Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 140, 4, 717, 0, 3, 109298, 0], a: [109346, 2147491252, 4206940, 4170914, 111756, 4170880, 4170548], usp: 0, isp: 4170220, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207038, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 199321574, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:45Z INFO  single] Event: NextCode
[2025-09-21T08:24:46Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [16, 20, 2, 717, 0, 3, 109298, 0], a: [4170404, 108012, 16252928, 4170914, 111756, 4170880, 4170548], usp: 0, isp: 4170316, sr: RegisterSR { 0: 8201, sr: 8201, ccr: 9, c: true, v: false, z: false, n: true, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 108902, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 207415062, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:46Z INFO  single] Event: NextCode
[2025-09-21T08:24:46Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 720896, 0, 2, 393343, 65534, 0, 0], a: [2, 106852, 4169668, 62, 4170158, 4175244, 4169586], usp: 0, isp: 4169468, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4279148, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 214022166, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:46Z INFO  single] Event: NextCode
[2025-09-21T08:24:47Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [16777472, 6, 6225964, 0, 0, 0, 1, 0], a: [4273878, 39878, 2688795140, 111416, 2456, 4170880, 4170534], usp: 0, isp: 4170290, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4274068, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 222652248, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:47Z INFO  single] Event: NextCode
[2025-09-21T08:24:47Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [15, 2, 47, 41, 393216, 1, 1, 0], a: [2688797168, 4170608, 2688795140, 111416, 2688795264, 4170156, 4170534], usp: 0, isp: 4170150, sr: RegisterSR { 0: 8209, sr: 8209, ccr: 17, c: true, v: false, z: false, n: false, x: true, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4274830, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 233472188, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:47Z INFO  single] Event: NextCode
[2025-09-21T08:24:48Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [2, 2, 204, 127, 458750, 1, 47, 6], a: [4270958, 4170608, 102, 12, 2688795264, 4170158, 4170534], usp: 0, isp: 4170150, sr: RegisterSR { 0: 8208, sr: 8208, ccr: 16, c: false, v: false, z: false, n: false, x: true, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4274886, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 245250954, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:48Z INFO  single] Event: NextCode
[2025-09-21T08:24:48Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4037694, 12, 1156, 32, 0, 0, 1, 0], a: [2688795166, 39878, 2688795140, 111416, 2456, 4170880, 4170534], usp: 0, isp: 4170286, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4274480, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 258401328, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:48Z INFO  single] Event: NextCode
[2025-09-21T08:24:49Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [2, 2, 30, 127, 458750, 1, 47, 6], a: [4270958, 4170608, 102, 12, 2688795264, 4170158, 4170534], usp: 0, isp: 4170150, sr: RegisterSR { 0: 8208, sr: 8208, ccr: 16, c: false, v: false, z: false, n: false, x: true, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4274882, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 270729468, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:49Z INFO  single] Event: NextCode
[2025-09-21T08:24:49Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [65596, 2, 24, 126, 458750, 1, 0, 0], a: [4270958, 4170608, 102, 12, 2688796080, 4170254, 4170534], usp: 0, isp: 4170150, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4275020, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 283056196, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:24:49Z INFO  single] Event: NextCode
[2025-09-21T08:24:50Z INFO  single] deduplicated 120 frames to 1