[2025-09-21T08:20:46Z INFO  snow_core::mac::compact::bus] Skipping memory test
[2025-09-21T08:20:46Z INFO  snow_core::cpu_m68k::cpu] Reset - SSP: B306E171, PC: 0040002A
[2025-09-21T08:20:46Z INFO  single] No replay file found
[2025-09-21T08:20:46Z INFO  single] Starting
[2025-09-21T08:20:46Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 0, 0, 0, 0, 0, 0, 0], a: [0, 0, 0, 0, 0, 0, 0], usp: 0, isp: 3003572593, sr: RegisterSR { 0: 9984, sr: 9984, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4194346, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: false, breakpoints: [], cycles: 24, fdd: [FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Accurate, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:20:46Z INFO  single] Event: NextCode
[2025-09-21T08:20:46Z INFO  snow_core::mac::swim::drive] Drive 0: disk inserted, 80 tracks, title: 'Fusillade'
[2025-09-21T08:20:46Z INFO  snow_core::emulator] Running
[2025-09-21T08:20:46Z INFO  snow_core::mac::compact::bus] Emulation speed: Uncapped
[2025-09-21T08:20:46Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 0, 0, 0, 0, 0, 0, 0], a: [0, 0, 0, 0, 0, 0, 0], usp: 0, isp: 3003572593, sr: RegisterSR { 0: 9984, sr: 9984, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4194346, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: false, breakpoints: [], cycles: 24, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Accurate, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:20:46Z INFO  single] Event: NextCode
[2025-09-21T08:20:46Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 0, 0, 0, 0, 0, 0, 0], a: [0, 0, 0, 0, 0, 0, 0], usp: 0, isp: 3003572593, sr: RegisterSR { 0: 9984, sr: 9984, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4194346, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 24, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Accurate, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:20:46Z INFO  single] Event: NextCode
[2025-09-21T08:20:47Z WARN  snow_core::mac::scc] B unimplemented wr reg 4 4C
[2025-09-21T08:20:47Z WARN  snow_core::mac::scc] A unimplemented wr reg 4 4C
[2025-09-21T08:20:47Z DEBUG snow_core::cpu_m68k::cpu] Illegal instruction PC 00400402: 4E7B 0100111001111011 Cannot decode instruction: 0100111001111011
[2025-09-21T08:20:47Z WARN  snow_core::cpu_m68k::cpu] Illegal instruction at PC $00400402
[2025-09-21T08:20:47Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294964803, 190, 189, 4294901778, 1840700269, 4196096, 0, 0], a: [4194276, 4193830, 4195736, 4204180, 4193536, 15720958, 4194304], usp: 0, isp: 1020, sr: RegisterSR { 0: 10004, sr: 10004, ccr: 20, c: false, v: false, z: true, n: false, x: true, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4205204, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 8297128, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:20:47Z INFO  single] Event: NextCode
[2025-09-21T08:20:47Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [65280, 34, 127, 65535, 1840700269, 4196096, 0, 0], a: [4207516, 15720958, 4265772, 6780, 4193536, 15720958, 4194480], usp: 0, isp: 262140, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207460, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 16342218, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:20:47Z INFO  single] Event: NextCode
[2025-09-21T08:20:48Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [65280, 34, 127, 65535, 1840700269, 4196096, 0, 0], a: [4207516, 15720958, 4265772, 6780, 4193536, 15720958, 4194480], usp: 0, isp: 262140, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207454, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 24532410, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:20:48Z INFO  single] Event: NextCode
[2025-09-21T08:20:48Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [65292, 34, 127, 65535, 1840700269, 4196096, 0, 0], a: [4208008, 15720958, 4265772, 6780, 4193536, 15720958, 4194480], usp: 0, isp: 262098, sr: RegisterSR { 0: 8464, sr: 8464, ccr: 16, c: false, v: false, z: false, n: false, x: true, int_prio_mask: 1, m: false, supervisor: true, trace: false }, pc: 4208066, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 32588474, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:20:48Z INFO  single] Event: NextCode
[2025-09-21T08:20:49Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [43690, 4294901760, 26, 0, 31, 0, 2863311530, 122], a: [4270958, 4179340, 2095638, 2095994, 4271630, 2096640, 2096066], usp: 0, isp: 2095620, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4271622, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 40270974, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:20:49Z INFO  single] Event: NextCode
[2025-09-21T08:20:49Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 105974, 128, 4, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095522, 6287360, 7216, 2096528, 2095482], usp: 0, isp: 2095430, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 47250180, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:20:49Z INFO  single] Event: NextCode
[2025-09-21T08:20:50Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 69005, 128, 1, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095522, 6287360, 7216, 2096528, 2095482], usp: 0, isp: 2095430, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302946, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 55685544, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:20:50Z INFO  single] Event: NextCode
[2025-09-21T08:20:50Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 122474, 128, 0, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302946, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 64117834, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:20:50Z INFO  single] Event: NextCode
[2025-09-21T08:20:51Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 85625, 128, 0, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302946, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 72553296, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:20:51Z INFO  single] Event: NextCode
[2025-09-21T08:20:51Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 95100, 128, 0, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 82175162, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:20:51Z INFO  single] Event: NextCode
[2025-09-21T08:20:52Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 79917, 128, 0, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 94960142, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:20:52Z INFO  single] Event: NextCode
[2025-09-21T08:20:52Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 107375, 128, 0, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302946, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 106558772, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:20:52Z INFO  single] Event: NextCode
[2025-09-21T08:20:53Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 68111, 128, 0, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 120001884, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:20:53Z INFO  single] Event: NextCode
[2025-09-21T08:20:53Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 140, 750, 4294901760, 1840644096, 4196096, 256, 0], a: [2096128, 2147491252, 4206940, 4198110, 225, 2096528, 2097152], usp: 0, isp: 2096088, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207038, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 132284414, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 0, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:20:53Z INFO  single] Event: NextCode
[2025-09-21T08:20:54Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294966022, 8660, 87040, 1274, 1476395061, 4199004, 256, 0], a: [18010, 5916, 16754, 18028, 5632, 2096528, 5632], usp: 0, isp: 2095944, sr: RegisterSR { 0: 8209, sr: 8209, ccr: 17, c: true, v: false, z: false, n: false, x: true, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4239424, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 140315444, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 0, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:20:54Z INFO  single] Event: NextCode
[2025-09-21T08:20:54Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 140, 74, 2, 8, 10, 35, 4294967221], a: [14672383, 7662, 15720958, 2099200, 0, 2099200, 4410926], usp: 0, isp: 2095944, sr: RegisterSR { 0: 8469, sr: 8469, ccr: 21, c: true, v: false, z: true, n: false, x: true, int_prio_mask: 1, m: false, supervisor: true, trace: false }, pc: 4411788, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 148382242, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 24, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:20:54Z INFO  single] Event: NextCode
[2025-09-21T08:20:55Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 120, 64, 0, 4294836374, 22, 63, 21], a: [16062, 776, 4444575, 4444926, 14678527, 15728638, 10485758], usp: 0, isp: 2095738, sr: RegisterSR { 0: 8964, sr: 8964, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4444784, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 155484714, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 13, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:20:55Z INFO  single] Event: NextCode
[2025-09-21T08:20:55Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1406, 3, 121, 0, 65535, 231, 140, 4294901783], a: [4444307, 7662, 4444306, 4444926, 14678527, 15728638, 10485758], usp: 0, isp: 2095702, sr: RegisterSR { 0: 8960, sr: 8960, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4444472, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 162723276, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 23, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:20:55Z INFO  single] Event: NextCode
[2025-09-21T08:20:56Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 195, 192, 203, 4294836605, 253, 28, 111], a: [114600, 776, 4444575, 4444926, 14678527, 15728638, 10485758], usp: 0, isp: 4171098, sr: RegisterSR { 0: 8968, sr: 8968, ccr: 8, c: false, v: false, z: false, n: true, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4444810, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 170431720, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 29, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:20:56Z INFO  single] Event: NextCode
[2025-09-21T08:20:56Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 168, 128, 191, 4294836257, 175, 129, 205], a: [29871, 776, 4444575, 4444926, 14678527, 15728638, 10485758], usp: 0, isp: 4171098, sr: RegisterSR { 0: 8968, sr: 8968, ccr: 8, c: false, v: false, z: false, n: true, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4444784, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 178657858, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 33, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:20:56Z INFO  single] Event: NextCode
[2025-09-21T08:20:57Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [216, 142721, 0, 0, 0, 0, 0, 0], a: [138652, 16252928, 16252928, 4171514, 0, 4171480, 4169916], usp: 0, isp: 4169896, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 135934, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 186141164, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 3, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:20:57Z INFO  single] Event: NextCode
[2025-09-21T08:20:57Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:20:57Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:20:57Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:20:57Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:20:57Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:20:57Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:20:57Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:20:57Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [2027720929, 135684, 142721, 255, 32773, 0, 0, 37250], a: [139870, 142721, 16252928, 4171514, 0, 4171480, 4169948], usp: 0, isp: 4169862, sr: RegisterSR { 0: 8208, sr: 8208, ccr: 16, c: false, v: false, z: false, n: false, x: true, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 136950, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 195581260, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 3, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:20:57Z INFO  single] Event: NextCode
[2025-09-21T08:20:58Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1005642220, 2, 140701, 0, 4129, 1862, 52339, 37250], a: [137609, 140701, 16252928, 4171514, 0, 4171480, 4169948], usp: 0, isp: 4169674, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 136936, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 200945760, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 3, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:20:58Z INFO  single] Event: NextCode
[2025-09-21T08:20:58Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1398, 3, 123, 0, 65535, 233, 140, 2], a: [4444306, 7662, 4444306, 4444926, 14678527, 15728638, 10485758], usp: 0, isp: 4169244, sr: RegisterSR { 0: 8968, sr: 8968, ccr: 8, c: false, v: false, z: false, n: true, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4444456, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 208773512, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 2, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:20:58Z INFO  single] Event: NextCode
[2025-09-21T08:20:59Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1217, 3, 123, 0, 65535, 0, 140, 2], a: [4444306, 7662, 4444306, 4444926, 14678527, 15728638, 10485758], usp: 0, isp: 4169244, sr: RegisterSR { 0: 8964, sr: 8964, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4444452, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 217180438, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 2, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:20:59Z INFO  single] Event: NextCode
[2025-09-21T08:21:00Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [2741610720, 135744, 142721, 255, 4129, 717, 140652, 130271], a: [136872, 142721, 16252928, 4171514, 0, 4171480, 4169948], usp: 0, isp: 4169674, sr: RegisterSR { 0: 8216, sr: 8216, ccr: 24, c: false, v: false, z: false, n: true, x: true, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 136956, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 225018828, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 2, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:21:00Z INFO  single] Event: NextCode
[2025-09-21T08:21:00Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [2165328608, 8, 142721, 0, 32773, 3, 173640, 130271], a: [141721, 142721, 16252928, 4171514, 0, 4171480, 4169952], usp: 0, isp: 4169618, sr: RegisterSR { 0: 8208, sr: 8208, ccr: 16, c: false, v: false, z: false, n: false, x: true, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 136960, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 232060928, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 2, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:21:00Z INFO  single] Event: NextCode
[2025-09-21T08:21:01Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 140, 750, 1346458632, 75007, 5632, 11, 15], a: [932, 2147491252, 4206940, 15662, 16214, 0, 14870], usp: 0, isp: 4169622, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207038, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 242714630, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 2, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:21:01Z INFO  single] Event: NextCode
[2025-09-21T08:21:01Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 128, 18, 190, 4294836674, 139, 11, 22], a: [31552, 776, 4444575, 4444926, 14678527, 15728638, 10485758], usp: 0, isp: 4169534, sr: RegisterSR { 0: 8976, sr: 8976, ccr: 16, c: false, v: false, z: false, n: false, x: true, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4444826, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 247849368, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 31, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:21:01Z INFO  single] Event: NextCode
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T08:21:01Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T08:21:02Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 140, 4, 717, 0, 3, 117908, 130271], a: [117956, 2147491252, 4206940, 4171514, 111644, 4171480, 4169888], usp: 0, isp: 4169560, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207042, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 256559764, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 1, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:21:02Z INFO  single] Event: NextCode
[2025-09-21T08:21:02Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 140, 4, 717, 0, 3, 117908, 130271], a: [117956, 2147491252, 4206940, 4171514, 111644, 4171480, 4169888], usp: 0, isp: 4169560, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207038, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 265352734, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 1, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:21:02Z INFO  single] Event: NextCode
[2025-09-21T08:21:03Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 2, 62, 1346454280, 75007, 32090, 512, 15], a: [15702, 9288, 25422, 15662, 15674, 4171480, 14926], usp: 0, isp: 4169672, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4232420, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 273117482, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 19, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:21:03Z INFO  single] Event: NextCode
[2025-09-21T08:21:03Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4030463, 753663, 4294902016, 4292673448, 4139352, 4109352, 4079352, 4049352], a: [119430, 4139354, 4049358, 119424, 4169398, 4171480, 4169470], usp: 0, isp: 4019348, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4287560, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 280228898, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 31, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:21:03Z INFO  single] Event: NextCode
[2025-09-21T08:21:04Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [9207807, 32767, 4294901760, 0, 4138726, 4108726, 4048726, 4078726], a: [4138726, 4108726, 4078726, 123346, 4168772, 4171480, 4168844], usp: 0, isp: 4018726, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4287610, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 286327046, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 31, image_title: "Fusillade", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SeFdhd, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T08:21:04Z INFO  single] Event: NextCode
[2025-09-21T08:21:04Z INFO  single] deduplicated 120 frames to 33