[2025-09-21T07:51:05Z INFO snow_core::mac::compact::bus] Skipping memory test [2025-09-21T07:51:05Z INFO snow_core::cpu_m68k::cpu] Reset - SSP: B2E362A8, PC: 0040002A [2025-09-21T07:51:05Z INFO single] No replay file found [2025-09-21T07:51:05Z INFO single] Starting [2025-09-21T07:51:05Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 0, 0, 0, 0, 0, 0, 0], a: [0, 0, 0, 0, 0, 0, 0], usp: 0, isp: 3001246376, sr: RegisterSR { 0: 9984, sr: 9984, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4194346, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: false, breakpoints: [], cycles: 24, fdd: [FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Accurate, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:05Z INFO single] Event: NextCode [2025-09-21T07:51:05Z INFO snow_core::mac::swim::drive] Drive 0: disk inserted, 80 tracks, title: 'Skyfox' [2025-09-21T07:51:05Z INFO snow_core::emulator] Running [2025-09-21T07:51:05Z INFO snow_core::mac::compact::bus] Emulation speed: Uncapped [2025-09-21T07:51:05Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 0, 0, 0, 0, 0, 0, 0], a: [0, 0, 0, 0, 0, 0, 0], usp: 0, isp: 3001246376, sr: RegisterSR { 0: 9984, sr: 9984, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4194346, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: false, breakpoints: [], cycles: 24, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Accurate, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:05Z INFO single] Event: NextCode [2025-09-21T07:51:05Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 0, 0, 0, 0, 0, 0, 0], a: [0, 0, 0, 0, 0, 0, 0], usp: 0, isp: 3001246376, sr: RegisterSR { 0: 9984, sr: 9984, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4194346, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 24, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Accurate, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:05Z INFO single] Event: NextCode [2025-09-21T07:51:05Z WARN snow_core::mac::scc] B unimplemented wr reg 4 4C [2025-09-21T07:51:05Z WARN snow_core::mac::scc] A unimplemented wr reg 4 4C [2025-09-21T07:51:05Z DEBUG snow_core::cpu_m68k::cpu] Illegal instruction PC 00400402: 4E7B 0100111001111011 Cannot decode instruction: 0100111001111011 [2025-09-21T07:51:05Z WARN snow_core::cpu_m68k::cpu] Illegal instruction at PC $00400402 [2025-09-21T07:51:05Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 4294942825, 420, 1346454347, 1840644100, 4259839, 0, 0], a: [6192, 4431224, 4237216, 2147489998, 6088, 15720958, 262130], usp: 0, isp: 262000, sr: RegisterSR { 0: 9988, sr: 9988, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4205862, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 11776496, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:05Z INFO single] Event: NextCode [2025-09-21T07:51:06Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [65280, 34, 127, 65535, 1840700269, 4196096, 0, 0], a: [4207516, 15720958, 4265772, 6780, 4193536, 15720958, 4194480], usp: 0, isp: 262140, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207460, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 24264108, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:06Z INFO single] Event: NextCode [2025-09-21T07:51:06Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [65280, 34, 127, 65535, 1840700269, 4196096, 0, 0], a: [4207516, 15720958, 4265772, 6780, 4193536, 15720958, 4194480], usp: 0, isp: 262140, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207460, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 36616294, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:06Z INFO single] Event: NextCode [2025-09-21T07:51:07Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 77194, 128, 4, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095522, 6287360, 7216, 2096528, 2095482], usp: 0, isp: 2095430, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302946, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 48042694, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:07Z INFO single] Event: NextCode [2025-09-21T07:51:07Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [66, 86491, 128, 0, 5, 1537736704, 2031866, 0], a: [402, 15720958, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095384, sr: RegisterSR { 0: 8448, sr: 8448, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 1, m: false, supervisor: true, trace: false }, pc: 4205382, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 60165274, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:07Z INFO single] Event: NextCode [2025-09-21T07:51:08Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 98517, 128, 0, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 74664564, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:08Z INFO single] Event: NextCode [2025-09-21T07:51:08Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 102134, 128, 0, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302946, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 86922780, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:08Z INFO single] Event: NextCode [2025-09-21T07:51:09Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 91400, 128, 0, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302946, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 99576294, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:09Z INFO single] Event: NextCode [2025-09-21T07:51:09Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 93893, 128, 0, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 114337720, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:09Z INFO single] Event: NextCode [2025-09-21T07:51:10Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 103323, 128, 0, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 123959878, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:10Z INFO single] Event: NextCode [2025-09-21T07:51:10Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 140, 2147484398, 4294901760, 1840644096, 4196096, 256, 0], a: [2096128, 2147491252, 4206940, 4198110, 225, 2096528, 2097152], usp: 0, isp: 2096088, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207042, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 135025266, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 0, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:10Z INFO single] Event: NextCode [2025-09-21T07:51:11Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 140, 10, 8, 0, 524301, 4294967295, 0], a: [932, 2147491252, 4206940, 16756, 16768, 0, 14864], usp: 0, isp: 2095992, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207042, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 143851784, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 0, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:11Z INFO single] Event: NextCode [2025-09-21T07:51:11Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 192, 255, 0, 4294836686, 206, 26, 9], a: [2109490, 776, 4414399, 4414738, 14678527, 15728638, 10485758], usp: 0, isp: 2095866, sr: RegisterSR { 0: 8980, sr: 8980, ccr: 20, c: false, v: false, z: true, n: false, x: true, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4414648, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 150995952, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 48, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:11Z INFO single] Event: NextCode [2025-09-21T07:51:12Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [3221225652, 9, 7, 1146290299, 7, 1080327, 0, 2], a: [2096060, 9282, 25518, 15656, 15656, 16236, 14912], usp: 0, isp: 2095844, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4223282, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 157821758, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 22, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:12Z INFO single] Event: NextCode [2025-09-21T07:51:12Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 6, 96, 189, 4294836656, 107, 18, 60], a: [28802, 776, 4414399, 4414738, 14678527, 15728638, 10485758], usp: 0, isp: 4171130, sr: RegisterSR { 0: 8968, sr: 8968, ccr: 8, c: false, v: false, z: false, n: true, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4414582, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 167168216, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 62, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:12Z INFO single] Event: NextCode [2025-09-21T07:51:13Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 64, 34, 0, 4294836482, 159, 95, 155], a: [113122, 776, 4414399, 4414738, 14678527, 15728638, 10485758], usp: 0, isp: 4117594, sr: RegisterSR { 0: 8964, sr: 8964, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4414650, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 174788156, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 64, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:13Z INFO single] Event: NextCode [2025-09-21T07:51:13Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 128, 128, 0, 4294836287, 6, 218, 70], a: [134307, 776, 4414399, 4414738, 14678527, 15728638, 10485758], usp: 0, isp: 4117594, sr: RegisterSR { 0: 8964, sr: 8964, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4414596, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 179926478, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 69, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:13Z INFO single] Event: NextCode [2025-09-21T07:51:14Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 196, 192, 207, 4294836689, 200, 191, 113], a: [155921, 776, 4414399, 4414738, 14678527, 15728638, 10485758], usp: 0, isp: 4117594, sr: RegisterSR { 0: 8968, sr: 8968, ccr: 8, c: false, v: false, z: false, n: true, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4414596, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 184639514, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 74, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:14Z INFO single] Event: NextCode [2025-09-21T07:51:14Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 96, 8318, 24, 81556, 78736, 4, 0], a: [4117988, 9282, 25416, 4118038, 0, 16236, 14992], usp: 0, isp: 4117896, sr: RegisterSR { 0: 8212, sr: 8212, ccr: 20, c: false, v: false, z: true, n: false, x: true, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4221466, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 192178064, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 1, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:14Z INFO single] Event: NextCode [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00 [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A [2025-09-21T07:51:15Z WARN snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00 [2025-09-21T07:51:15Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 140, 4, 717, 4128768, 4294901763, 171420, 0], a: [171468, 2147491252, 4206940, 4138756, 0, 4138392, 4117956], usp: 0, isp: 4117628, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207042, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 198716780, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 1, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:15Z INFO single] Event: NextCode [2025-09-21T07:51:15Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1358, 3, 122, 0, 65535, 0, 140, 1], a: [4414144, 7662, 4414144, 4414738, 14678527, 15728638, 10485758], usp: 0, isp: 4117486, sr: RegisterSR { 0: 8964, sr: 8964, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4414276, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 206557370, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 1, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:15Z INFO single] Event: NextCode [2025-09-21T07:51:16Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 140, 4, 717, 4128768, 4294901763, 171420, 0], a: [171468, 2147491252, 4206940, 4138756, 0, 4138392, 4117956], usp: 0, isp: 4117628, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207042, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 214775880, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 1, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:16Z INFO single] Event: NextCode [2025-09-21T07:51:16Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 16, 58, 250, 4294836560, 112, 18, 226], a: [28374, 776, 4414399, 4414738, 14678527, 15728638, 10485758], usp: 0, isp: 4117526, sr: RegisterSR { 0: 8960, sr: 8960, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4414602, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 222988270, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 43, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:16Z INFO single] Event: NextCode [2025-09-21T07:51:17Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [255, 65280, 131262, 134920, 4128779, 4294901762, 104264, 0], a: [4117802, 168116, 190938, 4131174, 0, 4138392, 4117906], usp: 0, isp: 4117898, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 166294, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 230689464, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 45, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:17Z INFO single] Event: NextCode [2025-09-21T07:51:17Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 192, 127, 255, 4294836440, 128, 55, 90], a: [28496, 776, 4414399, 4414738, 14678527, 15728638, 10485758], usp: 0, isp: 4117526, sr: RegisterSR { 0: 8984, sr: 8984, ccr: 24, c: false, v: false, z: false, n: true, x: true, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4414648, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 236547948, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 46, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:17Z INFO single] Event: NextCode [2025-09-21T07:51:18Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [512, 140, 41006, 1, 11, 1024, 0, 512], a: [33440, 206146, 4410352, 206146, 33428, 205634, 14928], usp: 0, isp: 4117584, sr: RegisterSR { 0: 8456, sr: 8456, ccr: 8, c: false, v: false, z: false, n: true, x: false, int_prio_mask: 1, m: false, supervisor: true, trace: false }, pc: 4205794, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 244118320, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 12, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:18Z INFO single] Event: NextCode [2025-09-21T07:51:18Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 146, 0, 233, 4294836419, 172, 65, 174], a: [30088, 776, 4414399, 4414738, 14678527, 15728638, 10485758], usp: 0, isp: 4117526, sr: RegisterSR { 0: 8964, sr: 8964, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4414630, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 252563002, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 14, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:18Z INFO single] Event: NextCode [2025-09-21T07:51:19Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 140, 6, 196, 1024, 0, 1024, 1024], a: [932, 2147491252, 4206940, 4131390, 0, 217652, 14928], usp: 0, isp: 4117668, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207042, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 260664908, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 16, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:19Z INFO single] Event: NextCode [2025-09-21T07:51:19Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 0, 0, 0, 4294836704, 216, 178, 0], a: [30850, 776, 4414399, 4414738, 14678527, 15728638, 10485758], usp: 0, isp: 4117526, sr: RegisterSR { 0: 8964, sr: 8964, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4414582, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 268611276, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 18, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:19Z INFO single] Event: NextCode [2025-09-21T07:51:20Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 76, 64, 159, 4294836338, 214, 247, 220], a: [31216, 776, 4414399, 4414738, 14678527, 15728638, 10485758], usp: 0, isp: 4117612, sr: RegisterSR { 0: 8968, sr: 8968, ccr: 8, c: false, v: false, z: false, n: true, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4414596, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 275149936, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 19, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:20Z INFO single] Event: NextCode [2025-09-21T07:51:20Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 6376, 8192, 2160, 3, 4294947780, 104264, 0], a: [229892, 104224, 227750, 229910, 103936, 4138392, 103936], usp: 0, isp: 4117794, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4239702, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 281673374, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 20, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:20Z INFO single] Event: NextCode [2025-09-21T07:51:21Z INFO single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [7226, 1, 106, 6302, 98, 103936, 104264, 0], a: [241082, 0, 104236, 240428, 103936, 4138392, 103936], usp: 0, isp: 4117734, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4238562, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 289785948, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 33, image_title: "Skyfox", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] } [2025-09-21T07:51:21Z INFO single] Event: NextCode [2025-09-21T07:51:21Z INFO single] deduplicated 120 frames to 1