[2025-09-21T07:49:49Z INFO  snow_core::mac::compact::bus] Skipping memory test
[2025-09-21T07:49:49Z INFO  snow_core::cpu_m68k::cpu] Reset - SSP: B2E362A8, PC: 0040002A
[2025-09-21T07:49:49Z INFO  single] No replay file found
[2025-09-21T07:49:49Z INFO  single] Starting
[2025-09-21T07:49:49Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 0, 0, 0, 0, 0, 0, 0], a: [0, 0, 0, 0, 0, 0, 0], usp: 0, isp: 3001246376, sr: RegisterSR { 0: 9984, sr: 9984, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4194346, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: false, breakpoints: [], cycles: 24, fdd: [FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Accurate, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:49:49Z INFO  single] Event: NextCode
[2025-09-21T07:49:49Z INFO  snow_core::mac::swim::drive] Drive 0: disk inserted, 80 tracks, title: 'Hacker'
[2025-09-21T07:49:49Z INFO  snow_core::emulator] Running
[2025-09-21T07:49:49Z INFO  snow_core::mac::compact::bus] Emulation speed: Uncapped
[2025-09-21T07:49:49Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 0, 0, 0, 0, 0, 0, 0], a: [0, 0, 0, 0, 0, 0, 0], usp: 0, isp: 3001246376, sr: RegisterSR { 0: 9984, sr: 9984, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4194346, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: false, breakpoints: [], cycles: 24, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Accurate, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:49:49Z INFO  single] Event: NextCode
[2025-09-21T07:49:49Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 0, 0, 0, 0, 0, 0, 0], a: [0, 0, 0, 0, 0, 0, 0], usp: 0, isp: 3001246376, sr: RegisterSR { 0: 9984, sr: 9984, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4194346, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 24, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Accurate, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:49:49Z INFO  single] Event: NextCode
[2025-09-21T07:49:49Z WARN  snow_core::mac::scc] B unimplemented wr reg 4 4C
[2025-09-21T07:49:49Z WARN  snow_core::mac::scc] A unimplemented wr reg 4 4C
[2025-09-21T07:49:49Z DEBUG snow_core::cpu_m68k::cpu] Illegal instruction PC 00400402: 4E7B 0100111001111011 Cannot decode instruction: 0100111001111011
[2025-09-21T07:49:49Z WARN  snow_core::cpu_m68k::cpu] Illegal instruction at PC $00400402
[2025-09-21T07:49:49Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294964963, 182, 182, 4294901762, 1840700269, 4196096, 0, 0], a: [4194276, 4193830, 4195736, 4204180, 4193536, 15720958, 4194304], usp: 0, isp: 1020, sr: RegisterSR { 0: 9988, sr: 9988, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 7, m: false, supervisor: true, trace: false }, pc: 4205204, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 10376168, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:49:49Z INFO  single] Event: NextCode
[2025-09-21T07:49:50Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [65280, 34, 127, 65535, 1840700269, 4196096, 0, 0], a: [4207516, 15720958, 4265772, 6780, 4193536, 15720958, 4194480], usp: 0, isp: 262140, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207460, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 22518294, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:49:50Z INFO  single] Event: NextCode
[2025-09-21T07:49:50Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [65292, 34, 127, 65535, 1840700269, 4196096, 0, 0], a: [4208008, 15720958, 4265772, 6780, 4193536, 15720958, 4194480], usp: 0, isp: 262098, sr: RegisterSR { 0: 8464, sr: 8464, ccr: 16, c: false, v: false, z: false, n: false, x: true, int_prio_mask: 1, m: false, supervisor: true, trace: false }, pc: 4208066, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 32588474, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:49:50Z INFO  single] Event: NextCode
[2025-09-21T07:49:51Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 102150, 128, 5, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095522, 6287360, 7216, 2096528, 2095482], usp: 0, isp: 2095430, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 44879170, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:49:51Z INFO  single] Event: NextCode
[2025-09-21T07:49:51Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 78154, 128, 0, 5, 1537736705, 2031866, 0], a: [6287377, 2096408, 2095522, 6287360, 7216, 2096528, 2095482], usp: 0, isp: 2095430, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 56082390, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:49:51Z INFO  single] Event: NextCode
[2025-09-21T07:49:52Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 120911, 128, 0, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 66624112, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:49:52Z INFO  single] Event: NextCode
[2025-09-21T07:49:52Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 82896, 128, 0, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 77564226, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:49:52Z INFO  single] Event: NextCode
[2025-09-21T07:49:53Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 128290, 128, 0, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302946, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 91140512, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:49:53Z INFO  single] Event: NextCode
[2025-09-21T07:49:53Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 108046, 128, 0, 5, 1537736704, 2031866, 0], a: [6287377, 2096408, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095422, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302952, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 104057766, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:49:53Z INFO  single] Event: NextCode
[2025-09-21T07:49:54Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [16, 110528, 128, 0, 5, 1537736704, 2031866, 0], a: [410, 15720958, 2095514, 6287360, 7216, 2096528, 2095474], usp: 0, isp: 2095384, sr: RegisterSR { 0: 8465, sr: 8465, ccr: 17, c: true, v: false, z: false, n: false, x: true, int_prio_mask: 1, m: false, supervisor: true, trace: false }, pc: 4205386, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 118819326, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:49:54Z INFO  single] Event: NextCode
[2025-09-21T07:49:54Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 140, 2147484398, 4294901760, 1840644096, 4196096, 256, 0], a: [2096128, 2147491252, 4206940, 4198110, 225, 2096528, 2097152], usp: 0, isp: 2096088, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207042, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 132049436, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 0, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:49:54Z INFO  single] Event: NextCode
[2025-09-21T07:49:55Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967168, 8448, 4294967104, 266, 1476395061, 4199004, 256, 0], a: [17018, 17054, 5916, 17014, 5632, 2096528, 5632], usp: 0, isp: 2095924, sr: RegisterSR { 0: 8208, sr: 8208, ccr: 16, c: false, v: false, z: false, n: false, x: true, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4239856, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 139863544, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 0, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:49:55Z INFO  single] Event: NextCode
[2025-09-21T07:49:55Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 140, 11, 8, 0, 0, 4294967295, 0], a: [932, 2147491252, 4206940, 16756, 17308, 0, 14864], usp: 0, isp: 2095992, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207038, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 145711196, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 0, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:49:55Z INFO  single] Event: NextCode
[2025-09-21T07:49:56Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1409, 3, 120, 0, 0, 236, 140, 3], a: [4414145, 7662, 4414144, 4414738, 14678527, 15728638, 10485758], usp: 0, isp: 2095866, sr: RegisterSR { 0: 8960, sr: 8960, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4414296, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 154281096, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 3, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:49:56Z INFO  single] Event: NextCode
[2025-09-21T07:49:56Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 214, 183, 0, 4294836695, 58, 10, 244], a: [29951, 776, 4414399, 4414738, 14678527, 15728638, 10485758], usp: 0, isp: 4171130, sr: RegisterSR { 0: 8964, sr: 8964, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4414574, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 162447846, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 46, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:49:56Z INFO  single] Event: NextCode
[2025-09-21T07:49:57Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294967232, 0, 57, 0, 4294836224, 171, 57, 9], a: [16748, 776, 4414399, 4414738, 14678527, 15728638, 10485758], usp: 0, isp: 4170140, sr: RegisterSR { 0: 8980, sr: 8980, ccr: 20, c: false, v: false, z: true, n: false, x: true, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4414836, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 170268406, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 4, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:49:57Z INFO  single] Event: NextCode
[2025-09-21T07:49:57Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1276, 3, 121, 0, 10, 0, 140, 43], a: [4414144, 7662, 4414144, 4414738, 14678527, 15728638, 10485758], usp: 0, isp: 4170250, sr: RegisterSR { 0: 8964, sr: 8964, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 3, m: false, supervisor: true, trace: false }, pc: 4414276, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 176297538, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 43, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:49:57Z INFO  single] Event: NextCode
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD6 4E
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD7 F9
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD8 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CD9 40
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDA 00
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDB 0A
[2025-09-21T07:49:58Z WARN  snow_core::mac::compact::bus] Write to unimplemented address: 00402CDC 00
[2025-09-21T07:49:58Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 140, 4, 717, 0, 3, 109298, 0], a: [109346, 2147491252, 4206940, 4170914, 111756, 4170880, 4170548], usp: 0, isp: 4170220, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207042, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 184128284, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:49:58Z INFO  single] Event: NextCode
[2025-09-21T07:49:58Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 140, 4, 717, 0, 3, 109298, 0], a: [109346, 2147491252, 4206940, 4170914, 111756, 4170880, 4170548], usp: 0, isp: 4170220, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207038, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 193036732, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:49:58Z INFO  single] Event: NextCode
[2025-09-21T07:49:59Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [1, 140, 4, 717, 0, 3, 109298, 0], a: [109346, 2147491252, 4206940, 4170914, 111756, 4170880, 4170548], usp: 0, isp: 4170220, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4207042, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 200112882, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:49:59Z INFO  single] Event: NextCode
[2025-09-21T07:49:59Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [0, 129284, 128, 0, 5, 1537736704, 250, 0], a: [6287377, 4170552, 129026, 6287360, 7216, 4170880, 4170548], usp: 0, isp: 4170496, sr: RegisterSR { 0: 8196, sr: 8196, ccr: 4, c: false, v: false, z: true, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4302946, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 205788484, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:49:59Z INFO  single] Event: NextCode
[2025-09-21T07:50:00Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [4294901892, 253, 4294901760, 0, 0, 0, 0, 0], a: [402, 15720958, 113384, 4170914, 129503, 4170880, 2097152], usp: 0, isp: 4170548, sr: RegisterSR { 0: 8456, sr: 8456, ccr: 8, c: false, v: false, z: false, n: true, x: false, int_prio_mask: 1, m: false, supervisor: true, trace: false }, pc: 4205384, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 213797556, fdd: [FddStatus { present: true, ejected: false, motor: true, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:50:00Z INFO  single] Event: NextCode
[2025-09-21T07:50:00Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [217, 0, 1156, 65535, 0, 0, 1, 0], a: [2688796288, 2688796728, 2688795140, 111416, 2456, 4170880, 4170534], usp: 0, isp: 4170150, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4274548, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 222154094, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:50:00Z INFO  single] Event: NextCode
[2025-09-21T07:50:01Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [2, 2, 102, 127, 458750, 1, 47, 6], a: [4270958, 4170608, 102, 12, 2688795264, 4170158, 4170534], usp: 0, isp: 4170150, sr: RegisterSR { 0: 8208, sr: 8208, ccr: 16, c: false, v: false, z: false, n: false, x: true, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4274884, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 233658864, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:50:01Z INFO  single] Event: NextCode
[2025-09-21T07:50:01Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [65596, 2, 0, 126, 458750, 1, 0, 47], a: [4170482, 4170608, 111418, 111416, 2456, 4170880, 4170534], usp: 0, isp: 4170150, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4275366, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 243796224, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:50:01Z INFO  single] Event: NextCode
[2025-09-21T07:50:02Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [720902, 720902, 0, 0, 458750, 1, 0, 47], a: [4170522, 106852, 106834, 4170444, 4170454, 4170880, 4169868], usp: 0, isp: 4169586, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4278400, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 255715488, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:50:02Z INFO  single] Event: NextCode
[2025-09-21T07:50:02Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [58, 105, 69, 111, 458750, 1, 0, 47], a: [4296442, 4169610, 106834, 4170444, 4170454, 4170880, 4169868], usp: 0, isp: 4169580, sr: RegisterSR { 0: 8192, sr: 8192, ccr: 0, c: false, v: false, z: false, n: false, x: false, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4270682, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 267221108, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:50:02Z INFO  single] Event: NextCode
[2025-09-21T07:50:03Z INFO  single] Event: Status: EmulatorStatus { regs: RegisterFile { d: [36, 4294967295, 65535, 4, 393343, 65534, 0, 0], a: [2, 4279350, 4169668, 62, 4170232, 4175630, 4169586], usp: 0, isp: 4169468, sr: RegisterSR { 0: 8217, sr: 8217, ccr: 25, c: true, v: false, z: false, n: true, x: true, int_prio_mask: 0, m: false, supervisor: true, trace: false }, pc: 4279382, dfc: 0, sfc: 0, vbr: 0, caar: 0, cacr: RegisterCACR { 0: 0, e: false, f: false, ce: false, c: false }, msp: 0, fpu: FpuRegisterFile { fp: [Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }, Float { sem: Semantics { exponent: 15, precision: 64, mode: NearestTiesToEven }, sign: false, exp: 0, mantissa: BigInt { parts: [0] }, category: NaN }], fpcr: RegisterFPCR { 0: 0, mode: 0, rnd: 0, prec: 0, exc: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false } }, fpsr: RegisterFPSR { 0: 0, fpcc: 0, fpcc_nan: false, fpcc_i: false, fpcc_z: false, fpcc_n: false, quotient: 0, quotient_s: false, exs: FpuExceptions { 0: 0, inex1: false, inex2: false, dz: false, unfl: false, ovfl: false, operr: false, snan: false, bsun: false }, aexc: FpuAccruedExceptions { 0: 0, inex: false, dz: false, unfl: false, ovfl: false, iop: false, snan: false, bsun: false } }, fpiar: 0 }, pmmu: PmmuRegisterFile { crp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, srp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, drp: RootPointerReg { 0: 0, lu: false, limit: 0, sg: false, dt: 0, table_addr: 0 }, pcsr: RegisterPCSR { 0: 0, ta: 0, flush: false, lw: false }, cal: AccessLevelReg { 0: 0, al: 0 }, val: AccessLevelReg { 0: 0, al: 0 }, scc: 0, ac: AccessControlReg { 0: 0, mc: false, alc: 0, mds: 0 }, tc: TcReg { 0: 0, enable: false, sre: false, fcl: false, ps: 0, is: 0, tia: 0, tib: 0, tic: 0, tid: 0 }, psr: RegisterPSR { 0: 0, bus_error: false, limit_violation: false, supervisor_violation: false, access_level_violatiom: false, write_protected: false, invalid: false, modified: false, gate: false, globally_shared: false, level_number: 0 }, last_desc: 0 } }, running: true, breakpoints: [], cycles: 280645084, fdd: [FddStatus { present: true, ejected: false, motor: false, writing: false, track: 1, image_title: "Hacker", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }, FddStatus { present: true, ejected: true, motor: false, writing: false, track: 4, image_title: "", dirty: false }], model: SE, speed: Uncapped, scsi: [None, None, None, None, None, None, None] }
[2025-09-21T07:50:03Z INFO  single] Event: NextCode
[2025-09-21T07:50:03Z INFO  single] deduplicated 120 frames to 1